MCL86 ported to Lattice XO2 Breakout Board

We just coupled the MCL86 core with an optimized Bus Interface Unit (BIU) and ported it to the Lattice XO2 Breakout Board where it consumes 551 (8%) of the XO2-7000’s registers.

This system-on-a-chip consists of the MCL86 EU core, on-chip RAM/ROM, and a UART and leaves 92% of this $10 FPGA’s registers unused and available

A YouTube video of it running will be posted soon!

MCL86 ported to Lattice XO2 Breakout Board