MicroCore Labs MCL51 8051 core

The MCL51 is an ultra-small footprint, microsequencer-based, 100% instruction-set compatible, 8051 core that can be implemented in any FPGA or ASIC technology which can utilize as little as 312 LUTs of a Xilinx Artix-7 FPGA.


Key Features:

100% Compatible with 8051 instruction set
Vectored interrupts with up to 128 sources
Proxy addressing for peripherals allows complete bus size flexibility
MCL51 with UART (w/Intel-Hex Loader) and dual-timer consume as little as 312 LUTs of a Xilinx Artix-7 FPGA


The MCL51 8051 core is an embedded processor core implemented with a high performance 32-bit microsequencer which can utilize as little as 312 Xilinx LUTs and two block RAMs. It is 100% compatible with the classic 8051 instruction set and has a Bus Interface Unit (BIU) that provides the maximum degree of flexibility allowing the SFR registers and peripherals to be customized to the user’s design. Improvements to the original 8051 include a vectored interrupt system and a proxy addressing which allows peripherals of any bus width to connect to the core.

The core was tested on a software suite that was validated under multiple simulation tools as well as on genuine 8051 silicon. 

Please see my blog and YouTube channel to see demonstrations using the MCL51 core that include a Quad Core 8051!

MCL51 Core

Xilinx Artix-7  XC7A35T

MCL51  with no peripherals

  MicroCore Labs

Copyright @ MicroCore Labs. All rights reserved.

Xilinx Artix-7   XC7A35T

+ UART w/Intel-Hex Loader

+ Dual Timer